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Thesis

Incremental modelling for verified communication architectures

Abstract:

Modern computer systems are advancing from multi-core to many-core designs and System-on-chips (SoC) are becoming increasingly complex while integrating a great variety of components, thus constituting complex distributed systems. Such architectures rely on extremely complex communication protocols to exchange data with required performance. Arguing formally about the correctness of communication is an acknowledged verification challenge.

This thesis presents a generic framework that...

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Institution:
University of Oxford
Research group:
Verification
Oxford college:
Balliol College
Department:
Mathematical,Physical & Life Sciences Division - Computing Laboratory
Role:
Author

Contributors

Role:
Supervisor
Publication date:
2011
Type of award:
DPhil
Level of award:
Doctoral
URN:
uuid:ec6c9e06-7395-4af4-b961-b2ed837fda89
Local pid:
ora:6650

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