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Thesis

Automated concurrency bug finding using partial-orders

Abstract:

Concurrent systems are ubiquitous, ranging from multi-core processors to large-scale distributed systems. Yet, the verification of concurrent systems remains a daunting task, and technological advances such as weak memory architectures greatly compound this problem. Such challenges have renewed interest in symbolic encodings of partial-order semantics of concurrency using propositional logic or decidable fragments of first-order logic. The impetus behind these partial-order encodings is th...

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Division:
MPLS
Department:
Computer Science
Role:
Author

Contributors

Department:
Computer Science
Role:
Supervisor
Department:
Computer Science
Role:
Supervisor
Department:
Computer Science
Role:
Examiner
Department:
Max Planck Institute for Software Systems
Role:
Examiner
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Name:
Intel Firmware Verification Project
Type of award:
DPhil
Level of award:
Doctoral
Awarding institution:
University of Oxford
UUID:
uuid:a7c5aaee-2a40-4c22-aed8-3e12287bc315
Deposit date:
2016-10-08

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