Optimizing Interface Dielectric Loss in Superconducting Coplanar Waveguide Resonators for Improved Quantum Circuit Coherence

Journal article

Superconducting quantum computing systems, including coplanar waveguide (CPW) resonators and qubits, are highly susceptible to energy dissipation from two-level systems (TLS) within bulk and interfacial dielectrics. CPW resonators serve as an ideal platform for characterizing these material losses at the single-photon excitation level. Building on recent experimental evidence that interface engineering can mitigate TLS losses, this study employs simulations to evaluate resonator quality factors across various interface modifications. Our results demonstrate that reducing losses at the substrate–air (SA) interface can increase the internal quality factor Qi by up to three orders of magnitude. While etching the SA interface also enhances Qi, material loss remains the dominant dissipation mechanism. Furthermore, we find that other lossy interfaces have a significantly smaller impact on the quality factor compared to the SA interface. These simulation results align with established experimental findings, providing a robust framework for refining resonator design. This work offers precise guidelines for TLS mitigation, essential for enhancing coherence times and developing more reliable superconducting quantum processors.

Authors: Saleh, OA; Rao, SG; Alghadeer, M; Omar, AA; Felemban, M

• Publication status: Published
• Peer review status: Peer reviewed
• Publisher: MDPI
• Journal: Technologies
• Volume: 14
• Issue: 2
• Pages: 128
• Article number: 128
• Publication date: 2026-02-18
• Acceptance date: 2026-02-04
• DOI: 10.3390/technologies14020128
• EISSN: 2227-7080
• ISSN: 2227-7080
• Language: English
• Keywords: CPW resonators; two-level system (TLS) losses; simulation of superconducting quantum chip