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Thesis

Developing a tileable superconducting circuit for quantum computation

Abstract:

Superconducting circuits have been demonstrated at the ~50 qubit scale, with gate fidelities approaching the thresholds required for error correction using surface codes. It is generally considered that maintaining and improving this performance while scaling to >100 qubits will require 3D integration of control wiring, and techniques to prevent or mitigate the effects of unwanted electromagnetic modes which emerge in the circuit environment at larger scales. At the present time, no single...

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Division:
MPLS
Department:
Physics
Sub department:
Condensed Matter Physics
Role:
Author

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Role:
Supervisor
ORCID:
0000-0002-1410-5642
Role:
Examiner
Role:
Examiner
Type of award:
DPhil
Level of award:
Doctoral
Awarding institution:
University of Oxford

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