Dark current reduction techniques for wide dynamic range logarithmic CMOS pixels

Conference item

CMOS logarithmic pixels are capable of simultaneously imaging more than 6 decades of light intensity. However, their low light sensitivity is limited by the inherent leakage current of a CMOS process that flows through the load transistor in the pixel in parallel with the photocurrent. In this paper, we will discuss various approaches based on process, circuits and layouts to reduce this dark current. Results from two different approaches will then be reported. The first approach uses a novel circuit to maintain the voltage around the photodiode as close to zero as possible. The second approach uses a new layout for the logarithmic pixel to reduce the dark current arising from the edges of the photodiode.

Authors: Choubey, B; Joseph, D; Aoyama, S; Collins, S; Is, T

• Publication status: Published
• Host title: ICIS '06: International Congress of Imaging Science, Final Program and Proceedings
• Pages: 155-159
• Publication date: 2006-01-01
• ISBN: 0892082607