Provably correct on−chip communication: A formal approach to automatic protocol converter synthesis

Journal article

Hardware module reuse is a standard solution to the problems of increasing complexity of chip architectures and pressure to reduce time to market. In the absence of a single module interface standard, predesigned modules for ?plug-and-play? usually require a converter between incompatible interface protocols. Current approaches to automatic synthesis of protocol converters mostly lack formal foundations and either employ abstractions far removed from the HDL implementation level or grossly simplify the structure of the protocols considered. This work presents a state-machine-based formalism for modeling bus-based communication protocols and a notion of protocol compatibility and of correct conversion between incompatible protocols. This formalism is used to derive algorithms for checking protocol compatibility and for provably correct, automatic converter synthesis. Experiments with automatic converter synthesis between different configurations of widely used commercial bus protocols, such as AMBA AHB, ASB APB, and the Open Core Protocol (OCP) are discussed. The work here is unique in its combination of a completely formal approach and the use of a low abstraction level that enables precise modeling of protocol characteristics that is also close to HDL.

Authors: Avnit, K; D'Silva, V; Sowmya, A; Ramesh, S; Parameswaran, S

• Journal: Transaction on Design Automation of Electronic Systems (TODAES)
• Volume: 14
• Issue: 2
• Pages: 1-41
• Publication date: 2009-03-01
• DOI: 10.1145/1497561.1497562