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Hardware Verification using Higher−Order Logic

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Publisher:
North−Holland
Host title:
From HDL Descriptions to Guaranteed Correct Circuit Designs: Proceedings of the IFIP WG 10.2 Working Conference on From HDL Descriptions to Guaranteed Correct Circuit Designs‚ Grenoble‚ France‚ 9–11 September‚ 1986
Publication date:
1987-01-01
ISBN:
044470194X
UUID:
uuid:ec6a4eff-ddf6-4c38-8da0-ba592243c8d4
Local pid:
cs:4705
Deposit date:
2015-03-31

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