Study of built-in amplifier performance on HV-CMOS sensor for the ATLAS phase-II strip tracker upgrade

Journal article

This paper focuses on the performance of analog readout electronics (built-in amplifier) integrated on the high-voltage (HV) CMOS silicon sensor chip, as well as its radiation hardness. Since the total collected charge from minimum ionizing particle (MIP) for the CMOS sensor is 10 times lower than for a conventional planar sensor, it is crucial to integrate a low noise built-in amplifier on the sensor chip to improve the signal to noise ratio of the system. As part of the investigation for the ATLAS strip detector upgrade, a test chip that comprises several pixel arrays with different geometries, as well as standalone built-in amplifiers and built-in amplifiers in pixel arrays has been fabricated in a 0.35 μm high-voltage CMOS process. Measurements of the gain and the noise of both the standalone amplifiers and built-in amplifiers in pixel arrays were performed before and after gamma radiation of up to 60 Mrad. Of special interest is the variation of the noise as a function of the sensor capacitance. We optimized the configuration of the amplifier for a fast rise time to adapt to the LHC bunch crossing period of 25 ns, and measured the timing characteristics including jitter. Our results indicate an adequate amplifier performance for monolithic structures used in HV-CMOS technology. The results have been incorporated in the next submission of a large-structure chip.

Authors: Liang, Z; Affolder, A; Arndt, K; Bates, R; Benoit, M

• Publication status: Published
• Peer review status: Peer reviewed
• Publisher: Elsevier
• Journal: Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
• Volume: 831
• Pages: 156-160
• Publication date: 2016-05-03
• Acceptance date: 2016-05-02
• DOI: 10.1016/j.nima.2016.05.007
• EISSN: 1872-9576
• ISSN: 0168-9002
• Keywords: Silicon Strips; HVCMOS; ATLAS phase-II upgrade