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Thesis

Precise abstract interpretation of hardware designs

Abstract:

This dissertation shows that the bounded property verification of hardware Register Transfer Level (RTL) designs can be efficiently performed by precise abstract interpretation of a software representation of the RTL.

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Rajdeep Mukherjee More by this author

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Department:
University of Oxford
Role:
Supervisor
Department:
University of Oxford
Role:
Supervisor
Type of award:
DPhil
Level of award:
Doctoral
Awarding institution:
University of Oxford

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