Conference item icon

Conference item

Clock specifications for temporal tasks in planning and learning

Abstract:
Recently, Linear Temporal Logics on finite traces, such as LTL𝑓 (or LDL𝑓 ), have been advocated as high-level formalisms to express dynamic properties, such as goals in planning domains or rewards in Reinforcement Learning (RL). This paper addresses the challenge of separating high-level temporal specifications from the low-level details of the underlying environment (domain or MDP), by allowing for expressing the specifications at a different time granularity than the environment. We study the notion of a clock which progresses the high-level LTL𝑓 specification, whose ticks are triggered by dynamic (low-level) properties defined on the underlying environment. The obtained separation enables terse high-level specifications while allowing for very expressive forms of clock expressed as general LTL𝑓 properties over low-level features, such as counting or occurrence/alternation of special events. We devise an automata-based construction to compile away the clock into a deterministic automaton that is polynomial in the size of the automata characterizing the high-level and clock specifications. We show the correctness of the approach and discuss its application in several contexts, including FOND planning, RL with LTL𝑓 Restraining Bolts, and Reward Machines.
Publication status:
Published
Peer review status:
Peer reviewed

Actions

Access Document

Publication website:
https://ceur-ws.org/Vol-3629/

Authors

More by this author
Institution:
University of Oxford
Division:
MPLS
Department:
Computer Science
Role:
Author
ORCID:
0000-0001-9680-7658
More by this author
Role:
Author
ORCID:
0000-0001-9566-3576
More by this author
Role:
Author
ORCID:
0000-0002-9116-251X


Publisher:
CEUR Workshop Proceedings
Host title:
Proceedings of the 5th Workshop on Artificial Intelligence and Formal Verification, Logic, Automata, and Synthesis (OVERLAY 2023)
Volume:
3629
Pages:
93-98
Series:
Italian Association for Artificial Intelligence (AIxIA)
Publication date:
2024-01-29
Acceptance date:
2023-10-04
Event title:
5th Workshop on Artificial Intelligence and Formal Verification, Logic, Automata, and Synthesis (OVERLAY 2023)
Event location:
Rome, Italy
Event website:
https://overlay.uniud.it/workshop/2023/
Event start date:
2023-11-07
Event end date:
2023-11-07
ISSN:
1613-0073


Language:
English
Keywords:
Pubs id:
1685359
Local pid:
pubs:1685359
Deposit date:
2024-04-14
ARK identifier:

Terms of use


Views and Downloads






If you are the owner of this record, you can report an update to it here: Report update to this record

TO TOP