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Analysis of a DS-CDMA receiver DLL architecture

Abstract:

This paper explores the design of a baseband Direct-Sequence CDMA system using a Delay-Locked Loop (DLL) for chip synchronization, for use in a high speed wireless data link. The performance of some feedback loop controllers is analyzed, and control aspects of the inherent loop delay due to the integrate and dump action are considered. It was decided that a Decision Directed DLL (DD-DLL) was simplest to implement for the high chip-rate application, and the synchronization of a 100 Mchips/seco...

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Publication status:
Published

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Institution:
University of Oxford
Department:
Oxford, MPLS, Engineering Science
Role:
Author
Volume:
1
Pages:
460-464
Publication date:
1996-01-01
URN:
uuid:fc89896a-6f2e-4428-9fb7-80151b1a33c7
Source identifiers:
64178
Local pid:
pubs:64178
ISBN:
0-7803-3567-8

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