Conference item
Verifying digital systems with MATLAB
- Abstract:
- A MATLAB toolbox is presented, with the goal of checking occurrences of design errors typically found in fixed-point digital systems, considering finite word-length effects. In particular, the present toolbox works as a front-end to a recently introduced verification tool, known as Digital-System Verifier (DSVerifier), and checks overflow, limit cycle, quantization, stability, and minimum phase errors in digital systems represented by transfer-function and state-space equations. It provides a command-line version with simplified access to specific functionality and a graphical-user interface, which was developed as a MATLAB application. The resulting toolbox enables application of verification to real-world systems by control engineers.
- Publication status:
- Published
- Peer review status:
- Peer reviewed
Actions
Access Document
- Files:
-
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(Preview, Accepted manuscript, pdf, 718.5KB, Terms of use)
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- Publisher copy:
- 10.1145/3092703.3098228
Authors
- Publisher:
- Association for Computing Machinery
- Host title:
- ISSTA 2017 Proceedings of the 26th ACM SIGSOFT International Symposium on Software Testing and Analysis
- Journal:
- 26th ACM SIGSOFT International Symposium on Software Testing and Analysis More from this journal
- Pages:
- 388-391
- Publication date:
- 2017-07-10
- Acceptance date:
- 2017-05-25
- DOI:
- ISBN:
- 9781450350761
- Keywords:
- Pubs id:
-
pubs:697889
- UUID:
-
uuid:de3d3e52-bcfe-43ea-8bd9-3b65c1b60c4c
- Local pid:
-
pubs:697889
- Source identifiers:
-
697889
- Deposit date:
-
2017-06-01
Terms of use
- Copyright holder:
- Association for Computing Machinery
- Copyright date:
- 2017
- Notes:
-
Copyright © 2017 Association for Computing Machinery.
This is the accepted manuscript version of the article. The final version is available online from ACM at: https://doi.org/10.1145/3092703.3098228
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