- Abstract:
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Stencil computations are a key class of applications, widely used in the scientific computing community, and a class that has particularly benefited from performance improvements on architectures with high memory bandwidth. Unfortunately, such architectures come with a limited amount of fast memory, which is limiting the size of the problems that can be efficiently solved. In this paper, we address this challenge by applying the well-known cache-blocking tiling technique to large scale stenci...
Expand abstract - Publication status:
- Published
- Peer review status:
- Peer reviewed
- Version:
- Accepted manuscript
- Files:
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(pdf, 635.9kb)
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- Publisher copy:
- 10.1145/3145617.3145619
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- Publisher:
- Association for Computing Machinery Publisher's website
- Publication date:
- 2017-11-12
- Acceptance date:
- 2017-09-25
- DOI:
- Pubs id:
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pubs:728940
- URN:
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uri:d6b13dc9-306b-40e4-82ee-8406eebb02cd
- UUID:
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uuid:d6b13dc9-306b-40e4-82ee-8406eebb02cd
- Local pid:
- pubs:728940
- Keywords:
- Copyright holder:
- Giles et al
- Copyright date:
- 2017
- Notes:
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© 2017 Copyright held by the owner/author(s). Publication rights
licensed to ACM. This is the accepted manuscript version of the article. The final version is available online from Association for Computing Machinery at: https://doi.org/10.1145/3145617.3145619
Conference item
Beyond 16GB: Out-of-core stencil computations
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Hungarian Academy of Sciences
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