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Fast and compact simulation models for a variety of FET nano devices by the CMOS EKV equations

Abstract:

In this paper we explore the possibility of using the equations of a well known compact model for CMOS transistors as a parameterized compact model for a variety of FET based nano-technology devices. This can turn out to be a practical preliminary solution for system level architectural researchers, who could simulate behaviourally large scale systems, while more physically based models become available for each new device. We have used a four parameter version of the EKV model equations and ...

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Journal:
2009 9th IEEE Conference on Nanotechnology, IEEE NANO 2009 More from this journal
Pages:
691-694
Publication date:
2009-01-01
Language:
English
Keywords:
Pubs id:
pubs:389051
UUID:
uuid:a73fea1c-a9a2-40ed-8ad9-d1299ed0ad3e
Local pid:
pubs:389051
Source identifiers:
389051
Deposit date:
2013-11-16

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