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The Impact of Hardware Scheduling Mechanisms on the Performance and Cost of Processor Designs.

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APA Style

Mueller, S., Leister, H., Dell, P., Gerteis, N., & Kroening, D. (1999). The Impact of Hardware Scheduling Mechanisms on the Performance and Cost of Processor Designs.

MLA Style

Mueller, S., et al. The Impact of Hardware Scheduling Mechanisms on the Performance and Cost of Processor Designs. 1999.

Chicago Style

Mueller, S, H Leister, P Dell, N Gerteis, and D Kroening. 1999. “The Impact of Hardware Scheduling Mechanisms on the Performance and Cost of Processor Designs.” In .
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+ Mueller, S More by this author

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+ Leister, H More by this author

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+ Dell, P More by this author

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+ Gerteis, N More by this author

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+ Kroening, D More by this author

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Bibliographic Details

Host title:: In Proc. 15th GI/ITG conference 'Architektur von Rechensystemen' ARCS'99
Publication date:: 1999-01-01

Item Description

UUID:: uuid:89da655b-b53b-499f-9031-f348d7ed571e
Local pid:: cs:748
Deposit date:: 2015-03-31

Terms of use

Copyright date:: 1999

Licence:: Terms and Conditions of Use for Oxford University Research Archive

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