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Journal article

Leakier wires: exploiting FPGA long wires for covert- and side-channel attacks

Abstract:

In complex FPGA designs, implementations of algorithms and protocols from third-party sources are common. However, the monolithic nature of FPGAs means that all sub-circuits share common on-chip infrastructure, such as routing resources. This presents an attack vector for all FPGAs that contain designs from multiple vendors, especially for FPGAs used in multi-tenant cloud environments, or integrated into multi-core processors. In this article, we show that “long” routing wires present a new s...

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Publication status:
Published
Peer review status:
Peer reviewed

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Files:
  • (Accepted manuscript, pdf, 4.7MB)
Publisher copy:
10.1145/3322483

Authors


More by this author
Institution:
University of Oxford
Division:
MPLS
Department:
Computer Science
Oxford college:
Kellogg College
Role:
Author
ORCID:
0000-0002-9471-9985
Publisher:
Association for Computing Machinery Publisher's website
Journal:
ACM Transactions on Reconfigurable Technology and Systems Journal website
Volume:
12
Issue:
3
Article number:
11
Publication date:
2019-08-15
Acceptance date:
2019-03-26
DOI:
EISSN:
1936-7414
ISSN:
1936-7406
Keywords:
Pubs id:
pubs:985128
UUID:
uuid:88318935-511e-4cde-b62c-aeb4b059bf77
Local pid:
pubs:985128
Source identifiers:
985128
Deposit date:
2019-03-27

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