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An improved parallel archutecture for MPEG-4 motion estimation in 3G mobile applications

Abstract:

A high-parallel VLSI core architecture for MPEG-4 motion estimation is proposed in this paper. It possesses the characteristics of low memory bandwidth and low clock rate requirements, thus primarily aiming at 3G mobile applications. Based on a one-dimensional tree architecture, the architecture employs the dual-register/buffer technique to reduce the preload and alignment cycles. As an example, full-search block matching algorithm has been mapped onto this architecture using a 16-PE array th...

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Publication status:
Published

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Institution:
University of Oxford
Department:
Oxford, MPLS, Physics
Batatia, H More by this author
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Volume:
2
Pages:
689-692
Publication date:
2003
ISSN:
1520-6149
URN:
uuid:474ee4e8-b0c1-49e5-abb3-3573a53eca7a
Source identifiers:
184732
Local pid:
pubs:184732
ISBN:
0-7803-7663-3

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