Mechanism of snapback failure induced by the latch-up test in high-voltage CMOS integrated circuits - ORA - Oxford University Research Archive

Back to Search

- BibTeX
- EndNote
- RefWorks

Conference

Mechanism of snapback failure induced by the latch-up test in high-voltage CMOS integrated circuits

Abstract:: An electrical overstress failure induced by a latch-up test is studied in high-voltage integrated circuits. The latchup test resulted in damage to the output NMOSFET due to snapback and also resulted in a latchup in the internal circuits. These mechanisms are analyzed and solutions are proposed to avoid the triggering of the output NMOSFET and the resulting latchup issue.

Publication status:: Published

Actions

Email

Email this record

Send the bibliographic details of this record to your email address.

Your Email
Please enter the email address that the record information will be sent to.

-
Your message (optional)
Please add any additional information to be included within the email.
Cite

Cite this record

APA Style

Tseng, J.-C., Chen, Y.-L., Hsu, C.-T., Tsai, F.-Y., Chen, P.-A., Ker, M.-D., & IEEE, E. D. S. R. G. (2008). Mechanism of snapback failure induced by the latch-up test in high-voltage CMOS integrated circuits. 625–626.

MLA Style

Tseng, J.-C., et al. Mechanism of Snapback Failure Induced by the Latch-up Test in High-Voltage CMOS Integrated Circuits. 2008, pp. 625–26.

Chicago Style

Tseng, J-C, Y-L Chen, C-T Hsu, F-Y Tsai, P-A Chen, M-D Ker, and EDSRG IEEE. 2008. “Mechanism of Snapback Failure Induced by the Latch-up Test in High-Voltage CMOS Integrated Circuits.” In , 625–26.
Tweet
Print

Authors

+ Tseng, J-C More by this author

Role:

Author

+ Chen, Y-L More by this author

Role:

Author

+ Hsu, C-T More by this author

Role:

Author

+ Tsai, F-Y More by this author

Role:

Author

+ Chen, P-A More by this author

Role:

Author

Expand authors...

Bibliographic Details

Pages:: 625-626
Publication date:: 2008-01-01
URN:: uuid:3c329cfc-cb6c-4d87-8e4a-f63a4bca7428
Source identifiers:: 21710
Local pid:: pubs:21710
ISBN:: 978-1-4244-2049-0

Item Description

Keywords:: EOS

latch-up

ESD

high-voltage

Terms of use

Copyright date:: 2008

License:: Terms and Conditions of Use for Oxford University Research Archive

Metrics

Views and Downloads

About views and downloads

If you are the owner of this record, you can report an update to it here: Report update to this record

TO TOP