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Building power consumption models from executable timed I/O automata specifications

Abstract:

We develop a novel model-based hardware-in-the-loop (HIL) framework for optimising energy consumption of embedded software controllers. Controller and plant models are specified as networks of parameterised timed input/output automata and translated into executable code. The controller is encoded into the target embedded hardware, which is connected to a power monitor and interacts with the simulation of the plant model. The framework then generates a power consumption model that maps control...

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Publication status:
Accepted
Peer review status:
Peer reviewed
Version:
Accepted Manuscript

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Institution:
University of Oxford
Department:
Oxford, MPLS, Computer Science
More by this author
Institution:
University of Oxford
Department:
Oxford, MPLS, Computer Science
More by this author
Institution:
University of Oxford
Department:
Oxford, MPLS, Computer Science
More by this author
Institution:
University of Oxford
Department:
Oxford, MPLS, Computer Science
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Grant:
AdG VERIWARE,; PoC VERIPACE
Publisher:
Association for Computing Machinery Publisher's website
Publication date:
2016
URN:
uuid:2736b15a-5452-4167-b9a6-cddbe4d0b3e2
Source identifiers:
599091
Local pid:
pubs:599091

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