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MUTA: enabling multi-task neural network inference in programmable data-planes

Abstract:
The need for real-time inference of large volumes of data led to the development of in-network machine learning. Programmable network switches can now execute various machine learning models in the data-plane at line rate. While a stream of data may require several prediction tasks, such as predicting bit rate, flow size, or traffic class, current solutions only support separate models for each task. This places a significant burden on the data-plane and leads to substantial resource consumption when deploying multiple tasks. To solve this problem, we introduce MUTA; a novel in-network multi-task learning solution. MUTA enables executing multiple inference tasks concurrently in the data-plane, without exhausting available resources. It introduces a data-plane mapping methodology to fit non-binarized multi-task neural networks within network switches. MUTA is deployed on P4-based hardware switches, and is shown to reduce memory requirements by ×10.5 and improve accuracy by up to 9.14% using limited training data, compared with state-of-the-art single-task learning solutions.
Publication status:
Published
Peer review status:
Peer reviewed

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Publisher copy:
10.1109/HPSR64165.2025.11038854

Authors


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Institution:
University of Oxford
Division:
MPLS
Department:
Engineering Science
Role:
Author
ORCID:
0000-0003-1894-722X
More by this author
Institution:
University of Oxford
Division:
MPLS
Department:
Engineering Science
Role:
Author
ORCID:
0000-0002-3655-2873


Publisher:
IEEE
Publication date:
2025-06-19
Acceptance date:
2025-03-21
Event title:
IEEE 26th Conference on High Performance Switching and Routing (HPSR 2025)
Event location:
Suita, Osaka, Japan
Event website:
https://hpsr2025.ieee-hpsr.org/
Event start date:
2025-05-20
Event end date:
2025-05-22
DOI:
EISSN:
2325-5609
ISSN:
2325-5595


Language:
English
Keywords:
Pubs id:
2119320
Local pid:
pubs:2119320
Deposit date:
2025-04-22

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